Abstract (EN):
Debugging electronic circuits is traditionally done with bench equipment directly connected to the
circuit under debug. In the digital domain, the difficulties associated with the direct physical access to
circuit nodes led to the inclusion of resources providing support to that activity, first at the printed
circuit level, and then at the integrated circuit level. The experience acquired with those solutions led to
the emergence of dedicated infrastructures for debugging cores at the system-on-chip level. However,
all these developments had a small impact in the analog and mixed-signal domain, where debugging
still depends, to a large extent, on direct physical access to circuit nodes. As a consequence, when analog
and mixed-signal circuits are integrated as cores inside a system-on-chip, the difficulties associated
with debugging increase, which cause the time-to-market and the prototype verification costs to also
increase.
The present work considers the IEEE1149.4 infrastructure as a means to support the debugging of
mixed-signal circuits, namely to access the circuit nodes and also an embedded debug mechanism
named mixed-signal condition detector, necessary for watch-/breakpoints and real-time analysis
operations. One of the main advantages associated with the proposed solution is the seamless
migration to the system-on-chip level, as the access is done through electronic means, thus easing
debugging operations at different hierarchical levels.
Language:
English
Type (Professor's evaluation):
Scientific
No. of pages:
15
License type: