Nome: | João Manuel Paiva Cardoso |
Sigla: | JMPC |
Estado: | Ativo |
R-000-75E | |
0000-0002-7353-1799 | |
5C1C-8247-D614 | |
C-5552-2008 | |
57188754078 |
Email Institucional: | jmpcfe.up.pt |
Voip: | 3234 |
Extensão Telefónica: | 3901 |
Salas: | I012B , I137 , J204 |
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Cargo | Data de Início |
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Membro do Conselho Cientifico | 2023-05-31 |
Diretor de Departamento Departamento de Engenharia Informática | 2023-02-01 |
Presidente do Conselho de Departamento Departamento de Engenharia Informática | 2023-02-01 |
Membro do Conselho de Departamento Departamento de Engenharia Informática | 2022-11-23 |
Presidente da Comissão Executiva Departamento de Engenharia Informática | 2023-02-01 |
João M. P. Cardoso received a 5-year Electronics Engineering degree from the University of Aveiro in 1993, and an MSc and a PhD degree in Electrical and Computer Engineering from the IST/UTL (Technical University of Lisbon), Lisbon, Portugal, in 1997 and 2001, respectively. He is a Full Professor at the Department of Informatics Engineering, Faculty of Engineering of the University of Porto, Porto, Portugal, and a research member of INESC TEC. Before, he was with the IST/UTL (2006-2008), a senior researcher at INESC-ID (2001-2009), and with the University of Algarve (1993-2006). In 2001/2002, he worked for PACT XPP Technologies, Inc., Munich, Germany.
He has been involved in the organization of various international conferences. He was General Co-Chair of IEEE/IFIP EUC’2015 and IEEE CSE’2015, General Chair of IEEE ASAP'2023 and FPL’2013, General Co-Chair of ARC’2014 and ARC’2006, Program Co-Chair of RAW’2010, and Program Co-Chair of DASIP’2014. He served as a Program Committee member for many international conferences.
He is co-author of one Springer book, co-editor of two Springer Books and three Springer LNCS volumes. He has (co-)authored over 200 scientific publications (including journal/conference papers and patents) on subjects related to compilers, embedded systems, and reconfigurable computing.
He has participated in several research projects: as co-scientific coordinator of the FP7 EU-funded project REFLECT (2010-2012), as technical manager of the H2020 FET-HPC project ANTAREX, and as coordinator of several nationally funded projects.
He is a senior member of IEEE, a member of IEEE Computer Society, and a senior member of ACM.
His research interests include compilation and high-level synthesis techniques, domain-specific languages, reconfigurable computing, application-specific architectures, hardware/software codesign, and high-performance embedded computing.
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