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João Cardoso

Fotografia de João Manuel Paiva Cardoso
Name: João Manuel Paiva Cardoso Link to the personal page of João Manuel Paiva Cardoso
Acronym: JMPC
Status: Active
https://www.authenticus.pt/R-000-75E
http://orcid.org/0000-0002-7353-1799
Institutional E-mail: jmpc@fe.up.pt
Voip: 3234
Telephone Extension: 3901
Rooms: J204 , I137

Functions

Category: Professor Catedrático
Career: Pessoal Docente de Universidades
Professional Group: Docente
Department: Department of Informatics Engineering

Positions

Position Beginning date
Member of the Scientific Board 2019-03-04
Department Director Departamento de Engenharia Informática 2018-12-05
Chairman of the Department Council Departamento de Engenharia Informática 2018-11-21
Member of the Department Council Departamento de Engenharia Informática 2018-11-21
Chairman of the Department Executive Committee Departamento de Engenharia Informática 2018-12-05
Member of the Scientific Committee Programa Doutoral em Engenharia Informática 2018-05-08

Personal Presentation

João M. P. Cardoso received a 5-year Electronics Engineering degree from the University of Aveiro in 1993, and an MSc and a PhD degree in Electrical and Computer Engineering from the IST/UTL (Technical University of Lisbon), Lisbon, Portugal in 1997 and 2001, respectively. He is currently Associate Professor at the Department of Informatics Engineering, Faculty of Engineering of the University of Porto, Porto, Portugal and a research member of INESC TEC. Before, he was with the IST/UTL (2006-2008), a senior researcher at INESC-ID (2001-2009), and with the University of Algarve (1993-2006). In 2001/2002, he worked for PACT XPP Technologies, Inc., Munich, Germany.

He has been involved in the organization of various international conferences. He was general Co-Chair of IEEE/IFIP EUC’2015 and IEEE CSE’2015, General Chair of FPL’2013, General Co-Chair of ARC’2014 and ARC’2006, Program Co-Chair of RAW’2010, and Program Co-Chair of DASIP’2014. He served as a Program Committee member for many international conferences. He is co-author of one Springer book, co-editor of two Springer Books and three Springer LNCS volumes. He has (co-)authored over 150 scientific publications (including journal/conference papers and patents) on subjects related to compilers, embedded systems, and reconfigurable computing. He is the technical manager of the H2020 FET-HPC project ANTAREX. He has participated in a number of research projects: as co-scientific coordinator of the FP7 EU-funded project REFLECT (2010-2012), and as coordinator of a number of national funded projects.

He is a senior member of IEEE, a member of IEEE Computer Society, and a senior member of ACM.

His research interests include compilation techniques, domain-specific languages, reconfigurable computing, application-specific architectures, and high-performance embedded computing.

Research

Category: Membro Integrado
Research and Development Centre: INESC TEC - INESC Tecnologia e Ciência
Interface Institute: Instituto de Engenharia de Sistemas e Computadores, Tecnologia e Ciência
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