Computer Architecture

Code:

L.EEC012

Acronym:

AC

Keywords
Classification	Keyword
OFICIAL	Systems Electronics and Digital Systems

Instance: 2022/2023 - 1S

Active?	Yes
Responsible unit:	Department of Electrical and Computer Engineering
Course/CS Responsible:	Bachelor in Electrical and Computer Engineering

Cycles of Study/Courses

Acronym	No. of Students	Study Plan	Curricular Years	Credits UCN	Credits ECTS	Contact hours	Total Time
L.EEC	295	Syllabus	2	-	6	52	162

Teaching language

Portuguese

Objectives

This course introduces the principles of operation of a modern computer and its overall architecture, with particular emphasis on the contribution of each subsystem to the overall performance.

The analysis of the physical implementation technology of computers (especially their CPU and its hierarchical memory organization), as well as the instruction set architecture (ISA), will enable students to identify and describe fundamental principles of computer operation, programming languages ​​(assembly in particular), and software development.

Learning outcomes and competences

After completing this course, students should be able to:

• Identify and describe the major subsystems of a personal computer: processing unit, memory and peripherals;


• Explain and evaluate the performance of computers in simple scenarios involving the performance equation of and Amdahl's law;


• Classifying and characterizing the types of instructions in a processing unit;


• Explain the basic principle of encoding instructions and identify their impact on performance;


• Write simple programs in Assembly ARMv8 language involving arithmetic, Boolean, comparison and jump operations;


• Describe the operation of a unicycle processing unit;


• Describe and explain the concept of "pipeline" and its impact on performance;


• Describe the operation of a pipelined processing unit;


• Apply knowledge of finite state machines to the analysis of the control unit of a pipelined processing unit;


• Identify data and control hazards that can arise in a pipelined processing unit;


• Calculate the impact of conflicts in the performance of a "pipeline" in simple scenarios;


• Distinguish between static and dynamic memories, and identify the respective areas of use;


• Explain the principle of operation of both types of memories;


• Identify the various levels of the memory hierarchy in a personal computer;


• Explain the working principle of "cache" memory;


• Describe the organization of a "cache" memory (associativity) and handling of miss accesses;


• Numerically evaluate the influence of memory hierarchy on performance;

Working method

Presencial

Pre-requirements (prior knowledge) and co-requirements (common knowledge)

Good knowledge in the field of Digital Systems as well as basics of Programming.

Program

The sylabus of Computer Architecture consists of the following topics:

• Introduction. Areas of application of computers and their characteristics. Programs: high-level languages, low-level languages. Conceptual model of program execution.


• Components of a computer: CPU (data path and control unit), memory, peripheral input/output. Evolution of processors and memories technology.


• Understanding the performance of CPUs. Performance equation. Benchmarks (SPEC). Energy consumption. Amdahl's Law.


• Instruction set of an ARM processor. Types of instructions: arithmetic, logical, comparison and jump. Addressing modes. instructions coding.


• Basic concepts of programming in "assembly" language. Analysis and implementation of simple programs using an ARM architecture emulator (DS-5).


• Organization of a processing unit. Unicycle organization of a CPU. Pipelining concept. Organization of a pipeline data path. Pipeline control. Pipeline conflicts: data and control hazards. Strategies for dealing with conflicts. Impact of conflict on performance.


• Static and Dynamic Memory: organization and conceptual model. Memory hierarchies.


• Cache Memory: Principle of operation, internal organization, associativity, handling cache misses. CPU performance with cache memory. Reduction of penalties associated with access misses.

Mandatory literature

David A. Patterson, John L. Hennessy; David A. Patterson, John L. Hennessy; Computer Organization and Design, The Hardware/Software Interface - ARM edition. ISBN: 978-0-12-801733-3
Hélio Sousa Mendonça; António José Araújo; Slides e outros documentos fornecidos
Hélio Sousa Mendonça; António José Araújo; Conjunto de exercícios propostos

Teaching methods and learning activities

In theoretical classes, subjects about computer architecture in general and ARM architecture in particular will be exposed, accompanied by the resolution of exercises.

In practical laboratory classes, exercises involving the topics covered in theoretical classes will be solved. Additionally, small assembly programs involving the ARM architecture will be developed.

Software

ARM DS-5 Community Edition

Evaluation Type

Distributed evaluation with final exam

Assessment Components

Designation	Weight (%)
Exame	60,00
Teste	20,00
Participação presencial	20,00
Total:	100,00

Amount of time allocated to each course unit

Designation	Time (hours)
Estudo autónomo	110,00
Frequência das aulas	52,00
Total:	162,00

Eligibility for exams

Obtaining attendance requires students to enroll in classes, to participate in PL classes, and not exceed the limit number of absences, corresponding to 25% of the foreseen PL classes, that is, they do not have more than 3 absences.

Enrolling in practical classes makes them lose the "Frequência" (attendance) they may have obtained in previous academic year.

Calculation formula of final grade

The final grade is calculated by:

CF = 0,2 x PL + 0,2 x T + 0,6 x E

where:

• PL = solving exercices in PL classes
• T = Test taken in the middle of the semester
• E = Final exam

If the student has already "Frequência" the previous year and chooses not to attend the PL classes (not registering in the classes), (s)he will have a formula similar to the one applied last year:

CF = 0,25 x T + 0,75 x E

Students without "Frequência" (attendance) are not admitted to the exam.

The grade obtained in the exam taken at the appeal season, if greater, will replace the final grade (CF).

The Test and the Exam will be carried out on the Moodle platform.

Classification improvement

Classification improvement can be done by taking the "Appeal" exam or taking the Exam at the normal season of the following academic year.

Observations

Doubts regarding matters of the PL classes should be asked, preferably, to the teachers of the respective classes.

The teachers responsible for this curricular unit are available for appointment (via email) or at a time to be defined:

• Prof. Hélio Sousa Mendonça (HSM), hsm@fe.up.pt, room I230;
• Prof. António José Araújo (AJA), aja@fe.up.pt, room I236.