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Digital Systems

Code: L.EEC005     Acronym: SD

Keywords
Classification Keyword
OFICIAL Systems Electronics and Digital Systems

Instance: 2022/2023 - 1S Ícone do Moodle

Active? Yes
Responsible unit: Department of Electrical and Computer Engineering
Course/CS Responsible: Bachelor in Electrical and Computer Engineering

Cycles of Study/Courses

Acronym No. of Students Study Plan Curricular Years Credits UCN Credits ECTS Contact hours Total Time
L.EEC 300 Syllabus 1 - 6 52 162
Mais informaçõesLast updated on 2022-09-30.

Fields changed: Objectives, Resultados de aprendizagem e competências, Métodos de ensino e atividades de aprendizagem, Fórmula de cálculo da classificação final, Melhoria de classificação, Bibliografia Complementar, Programa, Modo de trabalho, Software de apoio à Unidade Curricular, Componentes de Avaliação e Ocupação, Obtenção de frequência

Teaching language

Portuguese

Objectives

The main objectives for this curricular unit are:
• To explain the theoretical foundations and practical aspects of the analysis and synthesis of digital systems (combinational and sequential);
• To offer an introduction to modern digital system design using hardware description languages and tools for specification, simulation and synthesis;
• To introduce the fundamental concepts associated with the internal organization and operation of processors and their programming.

Learning outcomes and competences

Upon successfully completing this curricular unit students will be able to:
• Use different basis (decimal, binary, octal, hexadecimal) to represent and manipulate integer and fractional numbers, both positive and negative, and to realize sums and subtractions in these basis.
• Obtain representations of combinational functions in the form of truth tables, logic expressions, sums of minterms, or products of maxterms, from informal descriptions, and to perform the transformations needed to reduce their complexity and simplify the circuits which implement them.
• Analyze and design circuits with basic digital combinational building blocks like logic gates, multiplexers, decoders, adders and comparators.
• Understand the operation of bistable digital devices (flip-flops) and their use in the realization of synchronous sequential circuits.
• Obtain representations of finite state machines (FSM) such as state transition diagrams and state transition tables, from informal descriptions of their intended behavior.
• Analyze and design simple sequential circuits based on flip-flops, registers, counters and shift-registers.
• Understand the organization and the operation of the data path of a simple processor (ALU, registers, multiplexers and buses) and of its control unit (instruction decoding and sequencing).
• Develop and analyze simple programs in a symbolic language, dealing with arithmetic and logic operations, tests and jumps.
• Interpret and describe the structure of a digital system using a hardware description language (Verilog) taking advantage of the concepts of modularity and hierarchy.
• Aquire basic knowledge in the use of software tools for schematics capture and simulation (Digital), and of a synthesis tool (Xilinx ISE) for the implementation of digital circuits in programmable logic (FPGA).

In this curricular unit it is expected that the students will develop skills of spoken and written communication as well as personal and inter-personal working aptitudes.

Working method

Presencial

Program

• Positional number systems. Representation of integer numbers, with and without signal. Binary arithmetic.
• Boolean Algebra: application in the simplification of logic expressions. Analysis and synthesis of combinational circuits using logic gates and higher complexity blocks (multiplexers, decoders and comparators). Introduction to structural description and simulation of digital circuits using the Verilog hadware description language.
• Bistable digital devices (flip-flops) and their utilization in the realization of synchronous sequential circuits and finite state machines.  Analysis and synthesis of finite state machines using counters and shift-registers.
Identification of the main building blocks of a processing architecture, and presentation of the organization and functioning of a simple processor and its set of instructions.

Mandatory literature

António José Araújo; Sistemas Digitais - Exercícios resolvidos e propostos, Autor/FEUP, 2021
José Carlos Alves; Sistemas Digitais, Autor/FEUP, 2005

Complementary Bibliography

Morgado Dias; Sistemas Digitais - Princípios e Prática, FCA, 2013. ISBN: 978-972-722-700-6
John F. Wakerly; Digital design: Principles and Practices, 5th Edition, Pearson, 2018. ISBN: 9780134460093

Teaching methods and learning activities

Fundamentals and main concepts of the course contents are covered in theoretical classes (T) which also offer illustrative examples and exercises.

The practical and laboratory classes (PL) are dedicated to solving exercises and realizing experimental work intended to introduce digital system analysis and design techniques making use of PC based simulation and synthesis tools. The sequence of works leads to the realization of an elementary processor capable of executing sequences of instructions.

Software

Digital (https://github.com/hneemann/Digital)
Xilinx ISE (https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive-ise.html)

Evaluation Type

Distributed evaluation without final exam

Assessment Components

Designation Weight (%)
Teste 80,00
Participação presencial 20,00
Total: 100,00

Amount of time allocated to each course unit

Designation Time (hours)
Estudo autónomo 110,00
Frequência das aulas 52,00
Total: 162,00

Eligibility for exams

In order to obtain the frequência status, the students must register for sections (turmas) in order to participate in PL classes, and must not miss more than 25% of total number of planned sessions (i.e. not miss more than 3 class meetings).

Registering for sections (turmas):

• Students who have registered for the course in a previous academic year do not have to register for a section in order to take any of the exams. These students should not register for a section. If they do it, they lose the frequency obtained previously and are subject to the absence regime and the assessment component formed by questionnaires (Q) in PL classes..

• Nevertheless these students are strongly encouraged to attend T classes on a regular basis. They may also perform the laboratory exercises out of the normal class schedule, with the help of the instructors and the lab technicians, on periods agred with them. They may also do this in the time assigned to a PL session of their choice, subject to the acceptance and the rules specified by the instructor of such section.

Calculation formula of final grade

The final grade (CF) is determined by five questionnaires (Q), to be carried out in PL classes, and two tests (T1 and T2). Each test has two parts: part 1 evaluates the subjects presented in T classes and part 2 evaluates the laboratory works carried out in PL classes. The final grade (CF) is calculated by the expression:

CF = 0.2 x Q + 0.4 x T1 + 0.4 x T2


In order to pass this curricular unit students have to meet the requirements to obtain frequência, have a final rounded grade greater than or equal to 10, and a grade greater than or equal to 6.0 values both in T1 and T2 tests.

Obs.

• If the student has already attended the previous year and chooses not to attend the PL classes (not enrolling in the classes), his final classification (CF) is calculated by:

CF = 0.5 x T1 + 0.5 x T2

Students in these conditions do part 1 of T1 and T2 and, if they have obtained an average grade in the laboratory work greater than or equal to 6.0, they may, if they wish, use this grade in the calculation of CF, not performing the part 2 of T1 and T2 in the current academic year.

At the appeal season, students who have obtained frequency can also take an exam (PR), consisting of two parts, for the purposes of approval or improvement of the final grade.
Part 1 evaluates the subjects presented in T classes and part 2 evaluates the laboratory works carried out in PL classes. Students may take one or both parts of the appeal exam (PR). The rating obtained in part 1 of PR, if greater, replaces the average of part 1 of T1 and T2 and the classification obtained in part 2 of PR, if greater, replaces the average of part 2 of T1 and T2 in the calculation formula of final grade (CF).

Classification improvement

Classification improvement can be done by taking the "appeal" exam or in the next academic year.

The exam covers all the subjects taught and has two parts: part 1 evaluates the subjects presented in T classes and part 2 evaluates the laboratory works carried out in PL classes. The classification obtained in PR, if higher, replaces the average of the T1 and T2 tests in the calculation of the final grade (CF).


Observations

Doubts regarding subjects of the PL classes should be asked, preferably, to the teachers of the respective classes.

The teachers responsible for this curricular unit are available for attendance via email or at a time to be defined:

- Prof. António José Araújo (AJA), aja@fe.up.pt, room I236;
- Prof. Hélio Sousa Mendonça (HSM), hsm@fe.up.pt, room I230.
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