Go to:
Logótipo
You are here: Start > EEC0153

Analogue Microelectronics

Code: EEC0153     Acronym: MICA

Keywords
Classification Keyword
OFICIAL Telecommunications

Instance: 2018/2019 - 1S Ícone do Moodle

Active? Yes
Web Page: http://moodle.up.pt
Responsible unit: Department of Electrical and Computer Engineering
Course/CS Responsible: Master in Electrical and Computers Engineering

Cycles of Study/Courses

Acronym No. of Students Study Plan Curricular Years Credits UCN Credits ECTS Contact hours Total Time
MIEEC 8 Syllabus 5 - 6 56 162

Teaching Staff - Responsibilities

Teacher Responsibility
José Alberto Peixoto Machado da Silva

Teaching - Hours

Lectures: 2,00
Recitations: 2,00
Type Teacher Classes Hour
Lectures Totals 1 2,00
José Alberto Peixoto Machado da Silva 2,00
Recitations Totals 1 2,00
José Alberto Peixoto Machado da Silva 2,00
Mais informaçõesLast updated on 2018-09-17.

Fields changed: Prerequisites, Componentes de Avaliação e Ocupação, Programa

Teaching language

Suitable for English-speaking students

Objectives

This curricular unit aims at empowering students with the abilities and competences to design analogue and mixed-signal circuits in MOS sub-micron technologies. Following the study of the fundamental physics and manufacturing process principles, the simulation and modelling of active and passive components is discussed taking into consideration their implementation in silicon substrates and signals’ amplitude and frequency operating conditions. Afterwards, one proceeds with the design simulation and layout of different analogue and mixed-signal functional modules using dedicated CAD tools.

Learning outcomes and competences

Deepening of the knowledge on the physics and functional principles of semiconductor devices; get acquainted with fabrication technologies and layout of active and passive devices of MOS circuits; systematic approach to the design of circuits with MOS transistors in different operating modes; understanding of the restrictions and limitations imposed by non-idealities resulting from circuits’ specific functional characteristics and those resulting from implementation and manufacturing processes; analysis of small systems where analogue and mixed-signal circuits and blocks are used.

Working method

Presencial

Pre-requirements (prior knowledge) and co-requirements (common knowledge)

Knowledge of: circuits’ theory; analysis of circuits with MOS transistors operating in linear and switching modes, principles of feedback theory, frequency response and compensation.

Program

1- Introduction to microelectronics – MOS technology and manufacturing process. Design cycle of and integrated circuit; abstraction levels in the design and simulation of integrated circuits.
2 – Modelling and simulation of MOS circuits: overview of MOSFET’s concepts and operation; MOFET modelling in weak, moderate and strong inversion; advanced SPICE models.
3 – Technology and physical design of MOS active and passive components: optimisation of MOS circuits design for temperature, parasitics, process parameters variability, current leakaging, power, matching, and geometry. Layout of MOS transistors – simple structures, interdigited, common centroid. Design of passive components: capacitors, resistors, and inductors. Interconnections in VLSI analogue circuits: interconnections physics, RC models and transmission lines. Crosstalk and electromigration phenomena.
4 - Design and layout of Basic cells: current and voltage sources, current mirrors, switches, MOS resistors, MOS super transístor.
5 – Design, functional characterization and layout of analogue and mixed-signal modules considering optimization requirements for linearity, symmetrical excursion, frequency response, power consumption and noise: multipliers, operational and transconductance amplifiers (fully-differential and folded cascade architectures and with common-mode feedback), comparators, current conveyor.
6 – Implementation of linear, non-linear, and translinear operators in microelectronics technology
7 – Simulation and sensitivity analysis to functional deviations – variability of manufacturing process parameters, sensitivity analysis and optimum design (design centering), Monte Carlo and corners simulation
8 – Study of particular cases of microsystems involving continuous and discrete time and amplitude circuits: audio systems, wireless, wireline, and optical communication interfaces


Mandatory literature

R. Jacob Baker, Harry W. Li, David E. Boyce; CMOS circuit design, layout, and simulation. ISBN: 0-7803-3416-7
Allen Phillip E.; CMOS analog circuit design. ISBN: 0-19-511644-5

Complementary Bibliography

Schneider Márcio Cheren; CMOS analog design using all-region MOSFET modeling. ISBN: 978-0-521-11036-5

Teaching methods and learning activities

The approach to be followed is based on complementing theoretical study with laboratory exercises in order to complete the cycle of specification, design and functional analysis, physical design and optimization of the circuits.

In the set of tutorial and laboratory classes it is sought, for each subject, to obtain a balance among theoretical study, circumstantial analysis of functional and design particularities, and use of CAD tools. In the theoretical classes subjects are presented with reference to pointed-out study material, examples are analyzed and problems solved. Students’ participation is motivated with the preparation and presentation in the class of short synthesis works, monographies, or project results. In laboratory classes students will have the opportunity to get familiar with the use of microelectronics CAD tools.

One can consider that the main teaching and learning methods involved in this approach include, at different levels: lecturing, class discussion, case studies, tutoring, and project based learning.

keywords

Technological sciences > Engineering > Electronic engineering
Technological sciences > Technology > Micro-technology

Evaluation Type

Distributed evaluation with final exam

Assessment Components

Designation Weight (%)
Exame 30,00
Participação presencial 14,00
Prova oral 21,00
Trabalho laboratorial 35,00
Total: 100,00

Amount of time allocated to each course unit

Designation Time (hours)
Elaboração de projeto 42,00
Elaboração de relatório/dissertação/tese 8,00
Estudo autónomo 35,00
Frequência das aulas 48,00
Trabalho laboratorial 32,00
Total: 165,00

Eligibility for exams

It is mandatory, in accordance to the general evaluation rules, to attend and participate in at least ¾ of the laboratorial classes.
The approval in this curricular unit requires obtaining at least 9,0/20,0 points in the final exam and at least 9,5/20,0 points in the weighted average of exam and continuous evaluation components.

Calculation formula of final grade

The final mark comprises two components: continuous evaluation (CE) with a weight of 70% and the final exam (E) with a weight of 30%, i. e., Final Mark = 0,7xCE + 0,3xE.
Continuous evaluation is based on the assessment of students' attitude and performance in the classes and on the evaluation of projects, presentations and reports developed by the student.

Examinations or Special Assignments

Students to whom attending classes is not mandatory, according to current general evaluation rules, should develop a design project together with the delivery of a final report.

Special assessment (TE, DA, ...)

Students with particular statute (working students, associations’ leaders, …) have to solve a final exam whose result shall be conjugated with the continuous evaluation mark, maintaining the criterion Final Mark=0,7.CE+0,3.E to calculate the final mark.

Classification improvement

The improving of the final mark can be obtained, by the realization of an exam (to be done in the normal exams’ season of the next academic year), which can be theoretical or laboratory, or by the development of a project together with the delivery of a report for the improving of the continuous evaluation.

Recommend this page Top
Copyright 1996-2024 © Faculdade de Engenharia da Universidade do Porto  I Terms and Conditions  I Accessibility  I Index A-Z  I Guest Book
Page generated on: 2024-04-25 at 01:31:14 | Acceptable Use Policy | Data Protection Policy | Complaint Portal