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Computer Architecture and Organization

Code: EIC0083     Acronym: AOCO

Keywords
Classification Keyword
OFICIAL Computer Arquitechture

Instance: 2017/2018 - 1S Ícone do Moodle

Active? Yes
Responsible unit: Department of Electrical and Computer Engineering
Course/CS Responsible: Master in Informatics and Computing Engineering

Cycles of Study/Courses

Acronym No. of Students Study Plan Curricular Years Credits UCN Credits ECTS Contact hours Total Time
MIEIC 169 Syllabus since 2009/2010 1 - 6 70 162
Mais informaçõesLast updated on 2017-09-21.

Fields changed: Components of Evaluation and Contact Hours, Fórmula de cálculo da classificação final

Teaching language

Portuguese

Objectives

This course introduces the principles of operation and general structure of a modern computer and its general structure, with particular emphasis on the contribution of each subsystem to the overall performance. The analysis of the implementation technology of computers (logic circuits and memory), together with the basic principles of digital information representation, will allow students to identify and describe the principles of computer operation, programming languages and software development.

Learning outcomes and competences

After completing the course, students will be able to:

  1. Identify and describe the major subsystems of a personal computer;
  2. Describe and interpret binary representation of numerical information;
  3. Perform basic arithmetic operations in binary;
  4. Evaluate the performance of computers in simple scenarios;
  5. Identify and explain the operation of basic logic circuits (combinational and sequential);
  6. Explain the operation of standard combinational circuits;
  7. Explain the operation of solid-state memories and analyse the operation of memory modules;
  8. Explain the basic principles of instruction encoding;
  9. Write simple programs in assembly language involving Boolean and arithmetic operations, tests, jumps and subroutines;
  10. Describe the operation of a single-cycle processing unit;
  11. Explain organization and operation of direct-access cache memories;
  12. Identify the different levels of the memory hierarchy and their impact on performance.

Working method

Presencial

Program

M1.Introduction. Computers: application areas of and their characteristics.
M2.Representation of information: binary representation of integers. Elementary arithmetic operations. Codes. IEEE-754 floating-point format.
M3.Combinational logic circuits. Boolean expressions. Elementary logic gates. Logic diagrams. Logic simulator. Standard circuits.
M4.Synchronous circuits: Memory elements, register and counters. Address decoding.
M5.Computers: high-level languages, low-level languages. Conceptual model of program execution. Subsystems: CPU, memory, input/output peripherals.
M6.CPU performance: Basic performance equation, benchmarks, Amdahl's Law.
M7.Instruction set: Instruction types, address modes, encoding.
M8.Basic concepts of assembly programming. Assembler. Subroutines.
M9.Organization of a processing unit. Single-cycle CPU: performance, limitations. Exception handling.
M10. Cache memory: Memory hierarchies.  Cache memories. Performance.

Mandatory literature

David A. Patterson, John L. Hennessy; Computer Organization and Design: The Hardware/Software Interface (Fifth Edition), Elsevier Science, 2013. ISBN: 9780124077263
Conjuntos de exercícios resolvidos e exercícios propostos
Cópias de acetatos e textos fornecidos

Teaching methods and learning activities

Teaching methods

The course includes lectures on the subject matter, including, where appropriate, the presentation of examples and their discussion. The practical classes include the presentation, analysis and resolution of a number of problems.

Two small project activities (using simulation tools) to be carried out in two blocks of 3 practical classes (with the help of assistants).

Learning activities outside the classroom: Multiple-choice questionnaires for self-evaluation.

 

Software

Simulador DrMips
Sistema MARS (emulador/assembler)
Simulador LOGISIM

keywords

Technological sciences > Engineering > Computer engineering

Evaluation Type

Distributed evaluation without final exam

Assessment Components

Designation Weight (%)
Participação presencial 10,00
Teste 90,00
Total: 100,00

Amount of time allocated to each course unit

Designation Time (hours)
Estudo autónomo 66,00
Frequência das aulas 56,00
Trabalho laboratorial 40,00
Total: 162,00

Eligibility for exams

Elligibility for exams requires: Participation in, at least, 75% of the scheduled TP classes (excluding the TP classes for project work).

Elligibility must be acquired in the current edition of the curricular unit or have been acquired in the immediatley preceeding edition.

Calculation formula of final grade

The course grade is calculated from:

  • two tests (90 minutes each);
  • two quizzes about the practical projects (30 minutes each);
  • participation in the projects

There will be two moments for evaluation:

  • P1 = 0,7xT1 + 0,3xF1
  • P2 = 0,7xT2 + 0,3xF2
with T1 and T2: marks for the tests; F1 and F2: masrks for the quizzes. P1 and P2 are rounded to tenths of grade.

The final grade is given by 

NFinal = 0.1xNA + 0.9x (P1+P2)/2,

where NA is the mark for participation in the projects.

There will be an extra test exclusively for students who obtain a final score lower than 10   (after rounding). Each component (P1  or P2) with score below 9.5 may be taken once.
The maximum score awarded for  the extra test is 9.5 (out of 20) (for each component).
This score will replace the previous score of the corresponding component.
The extra test does not lower the final score.

Final grades above 18 (after rounding) are awarded only after an oral exam.

Special assessment (TE, DA, ...)

Taking the written tests and quizzes required of regular students.
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