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Microprocessors

Code: EEC0132     Acronym: MICR3

Instance: 2006/2007 - 2S

Active? Yes
Web Page: http://www.fe.up.pt/~jpsousa/micr3
Responsible unit: Electronics and Digital Systems
Course/CS Responsible: Master in Electrical and Computers Engineering

Cycles of Study/Courses

Acronym No. of Students Study Plan Curricular Years Credits UCN Credits ECTS Contact hours Total Time
LEEC 3 Plano de estudos de transição para 2006/07 3 8 8 -
MIEEC 88 Plano para alunos que em 2006 estiveram no 4º ano 3 - 8 -

Teaching language

Portuguese

Objectives

To develop the students’ ability to analyze and project microprocessor and microcontroller based systems.

Program

1. Revision of fundamental concepts on the architecture of microprocessor based systems: processor, memory, input/output circuits and auxiliary circuits. Integration in a single circuit.
2. Detailed study of the intel MCS51 microcontrollers. Special emphasis will be put on the internal peripherals and C language programming. Software development methodologies based on state machines or real-time executives.
3. Memory Systems: read/write cycles and access times. Types of memory (PROM, EPROM, E2PROM, SRAM, NVRAM). Memory addressing. Address decoding.
4. Input/output systems: digital (with and without isolation; AC/DC) and analog. Serial data and parallel-data communication. Communication standards(RS232C, RS485). Peripherals (PPI, DAC, ADC). Application examples of digital and analog interfaces, keyboards, LCD and 7 segment displays, etc.
5. Access to memories and peripherals by I2C and SPL bus
6. Other microprocessor families (PIC, AVR)
7. Architectures of 16 and 32 bits microprocessors, cycles, system bus and its control. Reference to the i86 microprocessors: programming model; addressing instructions and modes; interrupt processing. Interrupt controllers (PIC). Specific peripherals (UART, Timer). Arithmetic coprocessor.
8. Dynamic memory systems: architecture, analysis of a typical controllers’ functioning. Tranfers by direct access to memory (DMA). Memory management: virtual memory, paging and segmentation. Cache memory.
9. Microcomputers’ systems: centralized and distributed architectures; bus of standard systems (ISA, PCI).

Mandatory literature

Brey, Barry B.; The Intel microprocessors, N. ISBN: 0-13-048720-1
Schultz, Thomas W.; C and the 8051, N. ISBN: 0-13-754839-7

Teaching methods and learning activities

Two theoretical classes per week to present the contents with the support of transparencies and examples.
One laboratory class per week for the students to solve typical problems and develop laboratory assignments.

Software

Sistema de desenvolvimento para a família 51, emulador de terminal, sistema de desenvolvimento para a família 86, editor gráfico de esquemas. Estas aplicações estão disponíveis nas salas de informática e, em versão de demonstração mas 80% funcional, na página da disciplina para instalação em casa.

Evaluation Type

Distributed evaluation without final exam

Assessment Components

Description Type Time (hours) Weight (%) End date
Subject Classes Participação presencial 84,00
Exame 25,00
Teste 28,00
Trabalho escrito 33,00
Trabalho escrito 18,00
Total: - 0,00

Amount of time allocated to each course unit

Description Type Time (hours) End date
Estudo autónomo 42
Total: 42,00

Eligibility for exams

The students must attend at least 75% of laboratory classes.
Attendance component not inferior to 9,5 marks and written component not inferior to 6,5 marks (on a 0-20 scale).
If the students fulfil these conditions, the attendance component represents the frequency classification and is valid in the following year.

Calculation formula of final grade

Being: CF the final classification, CE the written component, CP the attendance component, MP the best test, PP the worst test, TL the laboratory assignment and DA the performance in class,
the final classification will be: CF=0,5CE+0,5CP; CE=0,6MP+0,4PP; CP=0,8TL+0,2DA

Special assessment (TE, DA, ...)

The attendance component will be obtained by the special evaluation students with a laboratory exam. The written component is similar to the other students’.

Classification improvement

Written and laboratory exam.

Observations

Throughout the year, the students are expected to work 5 or 6 hours /week beyond classes.
Office hours: Wednesday, from 14h30 to 16h00; other specific time can be scheduled by e-mail.

Language of instruction: Portuguese.
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