Computer Architecture
Instance: 2007/2008 - 2S
Cycles of Study/Courses
Teaching language
Portuguese
Objectives
The student will acquire basic knowledge about the structure and organisation of the most important modules of a conventional computer: central processing unit, memory subsystem and peripherals.
The student will also acquire basic knowledge about digital synchronous circuits and their specification in a hardware description language.
Program
1. Digital synchronous circuits. Memory elements, clocks, implementation of control structures (finite state machines and microprogramming). Specification of digital synchronous with Verilog HDL.
2. Central processing unit. Basic aspects of ALUs (revision), implementation strategies (single-cycle, multi-cycle and microprogrammed) e their description in Verilog. Impact on performance.
3. Organisation of the memory subsystem. Memory technology and basic operating principles. Memory hierarchy: cache memory and virtual memory. Characterising the performance of the memory subsystem.
4. Data input/output and peripherals. Types and characteristics of I/O devices, Interfaces. Storage devices. Data busses. Performance assessment of peripheral devices.
5. Advanced topics: pipelining, multiprocessing, and parallel architectures.
Mandatory literature
David Patterson, John Hennessy; Organização e Projeto de Computadores, 3/E: A Interface Hardware/Software, Editora CAMPUS. ISBN: C-8535215212
Patterson, David A, Hennessy, John L; Computer Organization and Design - The Hardware/Software Interface, 3rd edition, Morgan Kaufmann Publishers, 2005. ISBN: 1-55860-604-1
Complementary Bibliography
Palnitkar, Samir;
Verilog HDL. ISBN: 0-13-451675-3
José Delgado e Carlos Ribeiro; Arquitectura de Computadores, FCA Editora de Informática, 2007. ISBN: 972-722-245-5
Teaching methods and learning activities
The main topics are presented in the lectures, The practical sessions will be used for lab assignments and problem resolution.
Software
Xilinx ISE 8.2
Simulador Modelsim
keywords
Technological sciences > Technology > Computer technology
Technological sciences > Engineering > Computer engineering
Evaluation Type
Distributed evaluation with final exam
Assessment Components
Description |
Type |
Time (hours) |
Weight (%) |
End date |
Subject Classes |
Participação presencial |
56,00 |
|
|
|
Total: |
- |
0,00 |
|
Eligibility for exams
Continuous evaluation AD: Practical lab work. All the works have the same weight.
Minimum requirement: AD >= 8.0.
Calculation formula of final grade
The final classification (CF) is calculated as follows:
CF = 0.3 * AD + 0.7 * EF
EF: classification of the final exam
Requirements: EF>= 7.5 and AD >= 8.0.
Final exam: 2H, closed-book.
Special assessment (TE, DA, ...)
Special exam (3 H, closed-book) covering the entire subject matter.
Classification improvement
Final exam improvement: an exam with the same complexity and duration as the regular final exam.
Whole course improvement; special exam (3 H, closed-book) covering the entire subject matter.