Guest Editorial: IEEE TC Special Section on Compiler Optimizations for FPGA-Based Systems

• Type: Another Publication in an International Scientific Journal
• Date: 2021

Authors

João M. P. Cardoso (Author) FEUP; DeHon, A (Author) Other; Pozzi, L (Author) Other

Journal

Title: IEEE Transactions on Computers

Vol. 70

Pages: 2013-2014

ISSN: 0018-9340

Publisher: IEEE

Indexing

ISI Web of Knowledge - 0 Citations

Scopus - 0 Citations

Other information

Authenticus ID: P-00V-PVT

DOI: 10.1109/tc.2021.3117316

Abstract (EN): The papers in this special section focus on compiler optimization for FPGA-based systems. Reconfigurable computing (RC) is growing in importance in many computing domains and systems, from embedded, mobile to cloud, and high-performance computing. We have witnessed important advancements regarding the programming of RC-based systems, but further improvements are needed, especially regarding efficient techniques for automatic mapping of computations described in high-level languages to the RC resources. The resources of high-end FPGAs allow these devices to implement complex Systemson-a-Chip (SoCs) and substantial computational components of software applications, e.g., when used as hardware accelerators and/or as more energy-efficient computing platforms. This, however, increases the continuous need for efficient compilers targeting FPGAs, and other RC platforms, from high-level programming languages.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 2