Laboratory of Digital Systems

Code:

EEC0006

Acronym:

LSDI

Keywords
Classification	Keyword
OFICIAL	Electronics and Digital Systems

Instance: 2010/2011 - 1S

Active?	Yes
Responsible unit:	Electronics and Digital Systems
Course/CS Responsible:	Master in Electrical and Computers Engineering

Cycles of Study/Courses

Acronym	No. of Students	Study Plan	Curricular Years	Credits UCN	Credits ECTS	Contact hours	Total Time
MIEEC	300	Syllabus (Transition) since 2010/2011	1	-	7	77	189
		Syllabus	1	-	7	77	189

Teaching language

Portuguese

Objectives

This course aims to acquaint students with theoretical and practical aspects of analysis and synthesis of digital systems (combinational and sequential). It also aims to introduce the design of digital systems using computing tools, in order to be specified by description languages of hardware, simulation and synthesis. Furthermore, it also aims to introduce fundamental concepts related to the organization and functioning of microprocessors.

At the end of the course, students should be capable of:
- using different bases (decimal, binary, octal, hexadecimal) to represent and manipulate integers (positive and negative) and fractional numbers.
- Doing simple arithmetic operations (especially addition and subtraction) between numbers which are represented in different bases.
- Obtaining formal representations of combinational functions (truth table, logic expressions, and logic circuits) from an informal description and do transformations between them.
- Simplifying logic functions using Karnaugh maps.
- Analysing simple digital circuits with basic combinational digital blocks, such as logic gate, multiplexor, encoder/decoder, adder and comparator.
- Analysing the functioning of bi-stable digital devices (flip-flops).
- Obtaining formal representations of finite state machines (FSMs), as well as status table and state transition diagrams from an informal description.
- Analysing Moore and Mealy finite state machines.
- Projecting simple sequential circuits based on flip-flops, registers, counters and shift registers.
- Describing the functioning of an arithmetic logic unit (ALU).
- Analysing the data path of a small microprocessor (ALU, registers and bus circuits).
- Explaining and programming a control unit for a microprogrammed data path.
- Interpreting a digital circuit using a hardware description language such as Verilog.
- Describing a digital circuit using Verilog in a structural way by organizing it hierarchically.
- Identifying different technologies used in digital integrated circuits: pattern function (TTL, CMOS), programmable logic (PLDs, FPGAs).
- Using software tools of synthesis and simulation in digital circuits (ISE and MoldeSim) to implant in programmable logic (FPGAs).
- Developing personal, professional and interpersonal skills (team work and communication) namely concerning laboratory assignments.

Program

Numeration systems and representation of positive and negative numbers
Binary arithmetic
Boole’s algebra: simplification of logical expressions
Logic gates and combinational circuits
Minimization of combinational circuits
Analysis of state machines with synchronous sequential circuits form flip-flops and logic gates
Synthesis of combinational and sequential circuits using functional blocks such as multiplexors, decoders, counters, shift registers and programmable circuits
Modelling and simulation of combinational and sequential circuits with Verilog language to describe hardware
Introduction to microprocessors: programs in memory, internal organization, decoding unit, control of instructions

Mandatory literature

Wakerly, John F.; Digital design. ISBN: 0-13-089896-1
António José Araújo; Exercícios propostos para Laboratório de Sistemas Digitais, Autor/FEUP, 2009
José Carlos Alves; Sistemas Digitais, Autor/FEUP, 2005

Complementary Bibliography

Palnitkar, Samir; Verilog HDL. ISBN: 0-13-451675-3

Teaching methods and learning activities

Contents exposition in theoretical classes supported by the use of transparencies and analysis of illustrating exercises. The students will be provided with an exercise book that they will be encouraged to solve. The practical classes are occupied with solving a set of exemplifying exercises and with laboratory practical tasks. The laboratory component will be based on the use of Project tools of digital systems for FPGAs (simulation and synthesis) and physical performance on the prototyping platform FEUPIX available in the laboratories.

Software

XILINX ISE
ModelSim XE

Evaluation Type

Distributed evaluation without final exam

Assessment Components

Description	Type	Time (hours)	Weight (%)	End date
Attendance (estimated)	Participação presencial	70,00
1st mini-exam	Exame	1,00		2010-11-17
1st lab exam	Exame	1,00		2010-12-15
Lab assignments preparation	Trabalho escrito	20,00		2011-01-14
2nd mini-exam	Exame	1,00		2011-01-26
2nd lab exam	Exame	1,00		2011-01-26
	Total:	-	0,00

Amount of time allocated to each course unit

Description	Type	Time (hours)	End date
1st mini-exam preparation	Estudo autónomo	15	2010-11-17
Preparing 1st lab exam	Estudo autónomo	15	2010-12-15
2nd mini-exam preparation	Estudo autónomo	15	2011-01-26
Preparing 2nd lab exam	Estudo autónomo	15	2011-01-26
Self-study	Estudo autónomo	35	2011-01-26
	Total:	95,00

Eligibility for exams

Final Mark comprises three components (MT, F and L).
MT- 2 mini-tests
F- 2 class exercises
L- personal, professional and interpersonal skills (team work and communication) during laboratory assignments.

The students have to achieve a minimum grade of 6 out of 20 in the mini-tests and in the class exercises.
The students, who attended to the course in previous years, do not need to take the continuous assessment component, only the final exam.

Calculation formula of final grade

The Final Mark will be based on the following formula:
0,5*MT + 0,4*F + 0,1*L
M= MT1 + MT2 (marks of the 1st and 2nd mini-tests- both are worth the same);
F= F1+F2 (F1 is the mark of the 2nd and 3rd laboratory assignments and F2 the mark of the 4th and 5th laboratory assignments- both are worth the same);
L= mark of the laboratory classes

Examinations or Special Assignments

For the students whose statute dismisses them from the frequency of practical classes re expected special tests including the laboratory component.

Special assessment (TE, DA, ...)

The students whose special statute dismisses them from the frequency of practical classes will have to do evaluation tests including both theoretical and practical components with weights equivalent to those used in the final classification of distributed evaluation.

Classification improvement

Classification improvement obtained in the distributed evaluation (which will include the three evaluation components referred to above) may be done in the following year.

Observations

The preparation of Laboratory Assignments takes the same time as the Assignments themselves. The preparation of the other evaluation components (so that they keep up with the course) will demand the students a 1-2 hour/week period of time.

Office Hours:
JSM: Thursday, 16h – 17h
ASG: Wednesday, 14 h – 16h
HSM: Tuesday, 9 h – 10 h

You can also see your teacher in an interview scheduled directly with him.

Language of instruction: Portuguese.