Abstract (EN):
Fault injection is frequently used for the verification and validation of the fault tolerant features of microprocessors. This paper proposes the modification of a common on-chip debugging (OCD) infrastructure to add fault injection capabilities and improve performance. The proposed solution imposes a very low logic overhead and provides a flexible and efficient mechanism for the execution of fault injection campaigns, being applicable to different target system architectures.
Idioma:
Inglês
Tipo (Avaliação Docente):
Científica
Nº de páginas:
6
Tipo de Licença: