An infrastructure to functionally test designs generated by compilers targeting FPGAs

• Tipo: Artigo em Livro de Atas de Conferência Internacional
• Data: 2005

Autores

Rodrigues, R (Autor) Outra; João M. P. Cardoso (Autor) Outra

Ata de Conferência Internacional

Título: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS

Páginas: 30-31

Design, Automation and Test in Europe Conference and Exhibition (DATE 05)

Munich, GERMANY, MAR 07-11, 2005

Indexação

ISI Web of Knowledge - 3 Citações

Scopus - 3 Citações

Outras Informações

ID Authenticus: P-000-5HK

DOI: 10.1109/date.2005.60

Abstract (EN): This paper presents an infrastructure to test the functionality of the specific architectures output by a high-level compiler targeting dynamically reconfigurable hardware. It results in a suitable scheme to verify the architectures generated by the compiler, each time new optimization techniques are included or changes in the compiler are performed. We believe this kind of infrastructure is important to verify, by functional simulation, further research techniques, as far as compilation to Field-Programmable Gate Array (FPGA) platforms is concerned.

Idioma: Inglês

Tipo (Avaliação Docente): Científica

Nº de páginas: 2