A Flexible HLS Hoeffding Tree Implementation for Runtime Learning on FPGA

• Tipo: Artigo em Livro de Atas de Conferência Internacional
• Data: 2022

Autores

Sousa, LM (Autor) Outra; Nuno Paulino (Autor) FEUP; João Canas Ferreira (Autor) FEUP; João Bispo (Autor) FEUP

Ata de Conferência Internacional

Título: 2022 IEEE 21ST MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (IEEE MELECON 2022)

Páginas: 972-977

21st IEEE Mediterranean Electrotechnical Conference (IEEE MELECON)

Palermo, ITALY, JUN 14-16, 2022

Indexação

ISI Web of Knowledge - 2 Citações

Scopus - 3 Citações

Outras Informações

ID Authenticus: P-00V-V1A

DOI: 10.1109/melecon53508.2022.9843092

Abstract (EN): Decision trees are often preferred when implementing Machine Learning in embedded systems for their simplicity and scalability. Hoeffding Trees are a type of Decision Trees that take advantage of the Hoeffding Bound to allow them to learn patterns in data without having to continuously store the data samples for future reprocessing. This makes them especially suitable for deployment on embedded devices. In this work we highlight the features of a HLS implementation of the Hoeffding Tree. The implementation parameters include the feature size of the samples (D), the number of output classes (K), and the maximum number of nodes to which the tree is allowed to grow (Nd). We target a Xilinx MPSoC ZCU102, and evaluate: the design's resource requirements and clock frequency for different numbers of classes and feature size, the execution time on several synthetic datasets of varying sizes (N) and the execution time and accuracy for two datasets from UCI. For a problem size of D=3, K=5, and N=40000, a single decision tree operating at 103MHz is capable of 8.3x faster inference than the 1.2 GHz ARM Cortex-A53 core. Compared to a reference implementation of the Hoeffding tree, we achieve comparable classification accuracy for the UCI datasets.

Idioma: Inglês

Tipo (Avaliação Docente): Científica

Nº de páginas: 6