Using a tightly-coupled pipeline in dynamically reconfigurable platform FPGAs

• Tipo: Artigo em Livro de Atas de Conferência Internacional
• Data: 2005

Autores

Silva, ML (Autor) Outra; João Canas Ferreira (Autor) FEUP

Ata de Conferência Internacional

Título: DSD 2005: 8th Euromicro Conference on Digital System Design, Proceedings

Páginas: 383-386

8th Euromicro Conference on Digital System Design

Oporto, PORTUGAL, AUG 30-SEP 03, 2005

Indexação

ISI Web of Knowledge - 2 Citações

Scopus - 4 Citações

Outras Informações

ID Authenticus: P-000-5JR

DOI: 10.1109/DSD.2005.74

Abstract (EN): The paper describes the organization and use of a pipeline that is tightly-coupled to the CPU inside a platform FPGA with support for dynamic partial reconfiguration. It describes the overall hardware system organization and the pipeline structure, and presents the associated development environment and run-time support system, including the support for dynamically changing pipeline implementations and altering the operations of a pipeline stage.

Idioma: Inglês

Tipo (Avaliação Docente): Científica

Nº de páginas: 4