Generation of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems

• Tipo: Artigo em Revista Científica Internacional
• Data: 2007

Autores

Silva, ML (Autor) Outra; João Canas Ferreira (Autor) FEUP

Revista

Título: IET Computers and Digital Techniques

Vol. 1 Nº 5

Páginas: 461-471

ISSN: 1751-8601

Editora: Wiley-Blackwell

Indexação

ISI Web of Knowledge - 5 Citações

Scopus - 5 Citações

Outras Informações

ID Authenticus: P-004-7ST

DOI: 10.1049/iet-cdt:20060056

Abstract (EN): A tool called BITLINKER, that creates partially reconfigurable modules from the bit-streams of individual components is described. It is also capable of performing restricted component placement and interconnect routing between the assembled components. The resulting modules are used in applications that exploit partial dynamic reconfiguration. The tool is integrated in a design flow particularly aimed at dynamically reconfigurable platform field-programmable gate arrays (FPGAs). The associated development design flow and a run-time support system that can be used to manage module activation and data communication are described. Evaluation results obtained with a Virtex-II Pro system are also reported.

Idioma: Inglês

Tipo (Avaliação Docente): Científica

Nº de páginas: 11