Detection of Illegitimate Access to JTAG via Statistical Learning in Chip

• Tipo: Artigo em Livro de Atas de Conferência Internacional
• Data: 2015

Autores

Ren, XL (Autor) Outra; Vítor Grade Tavares (Autor) FEUP; Blanton, RD (Autor) Outra

Ata de Conferência Internacional

Título: Proceedings -Design, Automation and Test in Europe, DATE

Páginas: 109-114

2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015

9 March 2015 through 13 March 2015

Indexação

ISI Web of Knowledge - 9 Citações

Scopus - 15 Citações

Outras Informações

ID Authenticus: P-00G-TRY

Abstract (EN): IEEE 1149.1, commonly known as the joint test action group (JTAG), is the standard for the test access port and the boundary-scan architecture. The JTAG is primarily utilized at the time of the integrated circuit (IC) manufacture but also in the field, giving access to internal sub-systems of the IC, or for failure analysis and debugging. Because the JTAG needs to be left intact and operational for use, it inevitably provides a "backdoor" that can be exploited to undermine the security of the chip. Potential attackers can then use the JTAG to dump critical data or reverse engineer IP cores, for example. Since an attacker will use the JTAG differently from a legitimate user, it is possible to detect the difference using machine-learning algorithms. A JTAG protection scheme, SLIC-J, is proposed to monitor user behavior and detect illegitimate accesses to the JTAG. Specifically, JTAG access is characterized using a set of specifically-defined features, and then an on-chip classifier is used to predict whether the user is legitimate or not. To validate the effectiveness of the approach, both legitimate and illegitimate JTAG accesses are simulated using the OpenSPARC T2 benchmark. The results show that the detection accuracy is 99.2%, and the escape rate is 0.8%.

Idioma: Inglês

Tipo (Avaliação Docente): Científica

Nº de páginas: 6