OCD-FI, On-Chip Debugging and Fault Injection for validating microprocessor based dependable systems

• Type: Article in International Conference Proceedings Book
• Date: 2006

Authors

André Vaz Fidalgo (Author) Other; Gustavo R. Alves (Author) Other; José M. Ferreira (Author) FEUP

Conference proceedings National

Title: Actas das II Jornadas sobre Sistemas Reconfiguráveis

Pages: 1-4

II Jornadas sobre Sistemas Reconfiguráveis

Porto, 16 a 17 de Fevereiro de 2006

Scientific classification

FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering

Other information

Abstract (EN): This paper proposes a set of modifications to the on-chip debugging infrastructures present in many actual microprocessor cores, with the objective of supporting the validation and verification steps of fault-tolerant mechanisms through fault injection campaigns. A synthesisable microprocessor core for programmable components was used as a target system an. a debugging infrastructure compliant with the NEXUS 5001 proposed standard for onchip debugging was implemented on this target. To improve the process of real-time memory fault injection, an upgraded infrastructure designated as On-Chip Debugging and Fault Injection (OCD-FI) was developed. The complete system was analysed in terms of area overhead and fault injection capabilities and performance. All elements were designed as synthesizable VHDL modules and evaluated in simulation.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 4