Go to:
Logótipo
Comuta visibilidade da coluna esquerda
Você está em: Start > Publications > View > Using NEXUS compliant debuggers for real time fault injection on microprocessors
Publication

Publications

Using NEXUS compliant debuggers for real time fault injection on microprocessors

Title
Using NEXUS compliant debuggers for real time fault injection on microprocessors
Type
Article in International Conference Proceedings Book
Year
2006-09
Authors
José Martins Ferreira
(Author)
FEUP
André Fidalgo
(Author)
Other
The person does not belong to the institution. The person does not belong to the institution. The person does not belong to the institution. Without AUTHENTICUS Without ORCID
Manuel Gericota
(Author)
Other
The person does not belong to the institution. The person does not belong to the institution. The person does not belong to the institution. Without AUTHENTICUS Without ORCID
Gustavo Alves
(Author)
Other
The person does not belong to the institution. The person does not belong to the institution. The person does not belong to the institution. Without AUTHENTICUS Without ORCID
Scientific classification
FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering
CORDIS: Technological sciences > Engineering > Electrical engineering
Other information
Abstract (EN): As electronic devices get smaller and more complex, dependability assurance is becoming fundamental for many mission critical computer based systems. This paper presents a case study on the possibility of using the on-chip debug infrastructures present in most current microprocessors to execute real time fault injection campaigns. The proposed methodology is based on a debugger customized for fault injection and designed for maximum flexibility, and consists of injecting bit-flip type faults on memory elements without modifying or halting the target application. The debugger design is easily portable and applicable to different architectures, providing a flexible and efficient mechanism for verifying and validating fault tolerant components.
Language: English
Type (Professor's evaluation): Scientific
No. of pages: 6
License type: Click to view license CC BY-NC
Documents
File name Description Size
80.C-SBCCI_2006 471.88 KB
Related Publications

Of the same authors

Real time fault injection using on chip debug infrastructures: a case study (2006)
Article in International Conference Proceedings Book
André Fidalgo; Manuel Gericota; Gustavo Alves; José Ferreira
Recommend this page Top
Copyright 1996-2025 © Faculdade de Direito da Universidade do Porto  I Terms and Conditions  I Acessibility  I Index A-Z
Page created on: 2025-07-16 at 21:53:04 | Privacy Policy | Personal Data Protection Policy | Whistleblowing