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A processor for testing mixed-signal cores in System-on-Chip

Title
A processor for testing mixed-signal cores in System-on-Chip
Type
Article in International Conference Proceedings Book
Year
2005
Authors
Duarte, F
(Author)
Other
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José Machado da Silva
(Author)
FEUP
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Pinho, GA
(Author)
Other
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José Silva Matos
(Author)
FEUP
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Conference proceedings International
Pages: 184-191
8th Euromicro Conference on Digital System Design
Oporto, PORTUGAL, AUG 30-SEP 03, 2005
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Authenticus ID: P-000-5JP
Abstract (EN): This paper describes the design of a processor specific for testing cores embedded in system-on-chip. This processor which can be implemented within a system's reconfigurable area, shall be responsible for scheduling and control test operations and perform preliminary data processing, as well as to provide the interface with an external tester Building these test operations on-chip allows for simplifying external tester interface and to reduce testing time. The testing procedure and the infrastructure required to test an AID converter is described as an example.
Language: English
Type (Professor's evaluation): Scientific
No. of pages: 8
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