A processor for testing mixed-signal cores in System-on-Chip

• Tipo: Artigo em Livro de Atas de Conferência Internacional
• Data: 2005

Autores

Duarte, F (Autor) Outra; José Machado da Silva (Autor) FEUP; José Carlos Alves (Autor) FEUP; Pinho, GA (Autor) Outra; José Silva Matos (Autor) FEUP

Ata de Conferência Internacional

Título: DSD 2005: 8th Euromicro Conference on Digital System Design, Proceedings

Páginas: 184-191

8th Euromicro Conference on Digital System Design

Oporto, PORTUGAL, AUG 30-SEP 03, 2005

Indexação

ISI Web of Knowledge - 0 Citações

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Outras Informações

ID Authenticus: P-000-5JP

DOI: 10.1109/DSD.2005.11

Abstract (EN): This paper describes the design of a processor specific for testing cores embedded in system-on-chip. This processor which can be implemented within a system's reconfigurable area, shall be responsible for scheduling and control test operations and perform preliminary data processing, as well as to provide the interface with an external tester Building these test operations on-chip allows for simplifying external tester interface and to reduce testing time. The testing procedure and the infrastructure required to test an AID converter is described as an example.

Idioma: Inglês

Tipo (Avaliação Docente): Científica

Nº de páginas: 8