Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems

• Type: Article in International Scientific Journal
• Date: 2013

Authors

João Bispo (Author) Other; Nuno Paulino (Author) FEUP; João Cardoso (Author) FEUP; João Canas Ferreira (Author) FEUP

Journal

Title: IEEE Transactions on Industrial Informatics

Vol. 9 No. 3

Pages: 1625-1634

ISSN: 1551-3203

Publisher: IEEE

Indexing

ISI Web of Knowledge - 9 Citations

Scopus - 11 Citations

INSPEC

Scientific classification

FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering

CORDIS: Technological sciences > Engineering > Computer engineering ; Technological sciences > Engineering > Electronic engineering

Other information

Authenticus ID: P-006-8H5

DOI: 10.1109/tii.2012.2235844

Abstract (EN): This paper presents a novel approach to accelerate program execution by mapping repetitive traces of executed instructions, called Megablocks, to a runtime reconfigurable array of functional units. An offline tool suite extracts Megablocks from microprocessor instruction traces and generates a Reconfigurable Processing Unit (RPU) tailored for the execution of those Megablocks. The system is able to transparently movebcomputations from the microprocessor to the RPU at runtime. A prototype implementation of the system using a cacheless MicroBlaze microprocessor running code located in external memory reaches speedups from 2.2x to 18.2x for a set of 14 benchmark kernels. For a system setup which maximizes microprocessor performance by having the application code located in internal block RAMs, speedups from 1.4x to 2.8x were estimated.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 10