A system verification strategy based on the BST infrastructure

• Type: Article in International Conference Proceedings Book
• Date: 1999

Authors

Gustavo R. Alves (Author) Other; José M. Martins Ferreira (Author) FEUP

Conference proceedings International

Title: Proceedings of the International Symposium on Circuits and Systems ISCAS'99

Pages: 35-39

International Symposium on Circuits and Systems ISCAS¿99

Orlando, EUA, 30 de Maio a 2 de Junho de 1999

Indexing

ISI Web of Science

INSPEC

Scientific classification

CORDIS: Technological sciences > Engineering > Electrical engineering

FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering

Other information

DOI: 10.1109/ISCAS.1999.777799

Abstract (EN): A good verification strategy should bring near the simulation and real functioning environments. In this paper we describe a system-level co-verification strategy that uses a common flow for functional simulation, timing simulation and functional debug. This last step requires the use of a BST infrastructure, now widely available on commercial devices, specially on programmable devices with medium / large pin-counts.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 5