Accumulator size minimization for a fast cumulant-based motion estimator

• Type: Article in International Scientific Journal
• Date: 2005

Authors

Cardoso, JS (Author) FCUP; Corte Real, L (Author) FEUP

Journal

Title: IEEE Transactions on Circuits and Systems for Video Technology

Vol. 15 No. 12

Pages: 1660-1664

ISSN: 1051-8215

Publisher: IEEE

Indexing

ISI Web of Knowledge - 1 Citation

Scopus - 2 Citations

Scientific classification

CORDIS: Technological sciences > Engineering > Electrical engineering

FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering

Other information

Authenticus ID: P-000-07V

DOI: 10.1109/tcsvt.2005.858614

Abstract (EN): The implementation of fast dedicated processor for block matching motion estimation based on cumulants matching criteria implies the optimization of all of its components. Special care should be spent with the multiply-accumulate unit that is the core of many digital signal processing systems. Therefore, its optimization may be of outmost importance, specially if a significative number of such units are present in the platform. In this paper, the minimization of the size of one such unit is provided for a specific application, although the results have relevance in other scenarios.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 5