Generation of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems

• Type: Article in International Conference Proceedings Book
• Date: 2005

Authors

Miguel L. Silva (Author) FEUP; João Canas Ferreira (Author) FEUP

Conference proceedings International

Title: Proceedings of the XX Conference on Design of Circuits and Integrated Systems

Pages: 1-6

XX Conference on Design of Circuits and Integrated Systems

Lisboa, Portugal, Novembro de 2005

Indexing

Scopus

INSPEC

Scientific classification

FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering

CORDIS: Technological sciences > Engineering > Electrical engineering

Other information

DOI: 10.1049/iet-cdt:20060056

Abstract (EN): This paper describes a tool that creates partially-reconfigurable modules from the bitstreams of individual component modules. The resulting modules are intended for use in applications that exploit partial dynamic reconfiguration. The tool is integrated in a design flow particularly aimed at dynamically-reconfigurable platform FPGAs. The corresponding design flow is described together with a basic run-time support system.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 6