Parallel Implementation on FPGA of Support Vector Machines Using Stochastic Gradient Descent

• Type: Article in International Scientific Journal
• Date: 2019

Authors

Felipe F. Lopes (Author) Other; João Canas Ferreira (Author) FEUP; Marcelo A. C. Fernandes (Author) Other

Journal

Title: Electronics (Switzerland)

Vol. 8 No. 6

ISSN: 2079-9292

Publisher: MDPI

Indexing

ISI Web of Knowledge - 20 Citations

Scopus - 25 Citations

Other information

Authenticus ID: P-00Q-W39

DOI: 10.3390/electronics8060631

Abstract (EN): Sequential Minimal Optimization (SMO) is the traditional training algorithm for Support Vector Machines (SVMs). However, SMO does not scale well with the size of the training set. For that reason, Stochastic Gradient Descent (SGD) algorithms, which have better scalability, are a better option for massive data mining applications. Furthermore, even with the use of SGD, training times can become extremely large depending on the data set. For this reason, accelerators such as Field-programmable Gate Arrays (FPGAs) are used. This work describes an implementation in hardware, using FPGA, of a fully parallel SVM using Stochastic Gradient Descent. The proposed FPGA implementation of an SVM with SGD presents speedups of more than 10,000x relative to software implementations running on a quad-core processor and up to 319x compared to state-of-the-art FPGA implementations while requiring fewer hardware resources. The results show that the proposed architecture is a viable solution for highly demanding problems such as those present in big data analysis.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 15