A simulated annealing approach for high-level synthesis with reconfigurable functional units

• Type: Article in International Conference Proceedings Book
• Date: 1996

Authors

José Carlos Alves (Author) FEUP; José Silva Matos (Author) FEUP

Conference proceedings International

Title: 38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2

Pages: 314-317

38th Midwest Symposium on Circuits and Systems

RIO JANEIRO, BRAZIL, AUG 13-16, 1995

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Other information

Authenticus ID: P-001-FS3

Abstract (EN): In this paper, we present an application of the simulation annealing optimization algorithm to the problem of high-level synthesis of digital systems, targeted to architectures with run-time reconfigurable functional units. The scheduling, allocation and binding problems are treated simultaneously. Reconfiguration times and execution delays are taken into account, along with pipelined execution and precise clock cycles for consumption of each operand.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 4