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Publications with the same authors as the A development support system for applications that use dynamically reconfigurable hardware publication

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Article in National Scientific Journal

O Boundary Scan Test: conceitos, limitações, e perspectivas de futuro
José M. M. Ferreira (Author) (FEUP); José A. R. S. Matos (Author) (FEUP); Raul F. A. M. Vidal (Author) (FEUP); João P. C. Ferreira (Author) (FEUP); Ana M. Leão (Author) (Other)

Article in International Scientific Journal

Test of mixed-signal boards using test-support ICs. Part I - Hardware
José Silva Matos (Author) (FEUP); João Canas Ferreira (Author) (FEUP); Ana Leão (Author) (Other); José Machado da Silva (Author) (FEUP)
1995
Scalable hardware architecture for disparity map computation and object location in real-time
Santos, PM (Author) (Other); João Canas Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)
2016
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Scalable Hardware Architecture for Disparity Map Computation and Object Location in Real-Time
Pedro Santos (Author) (FEUP); João Canas Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)

Article in International Conference Proceedings Book

Teste de Circuitos Electrónicos Analógicos a Partir de um Barramento de Teste Digital Normalizado
Ana Leão (Author) (Other); João Canas Ferreira (Author) (FEUP); José Machado da Silva (Author) (FEUP); José Silva Matos (Author) (FEUP)
1994

Article in International Conference Proceedings Book

Parallelizing 2D Packing Problems with a Reconfigurable Computing Subsystem
José Carlos Alves (Author) (FEUP); C. Albuquerque (Author) (Other); João Canas Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)
2000
Mixed-Hardware/Software Applications on Dynamically Reconfigurable Hardware
João Canas Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)
1998
Mixed hardware/software applications on dynamically reconfigurable hardware
João Canas Ferreira (Author) (FEUP); Matos, JS (Author) (Other); José Silva Matos (Author) (FEUP)
1998
Indexing
High-Level Test Specification and Planning for Mixed-Signal Boards with Boundary-Scan
João Canas Ferreira (Author) (FEUP); Ana Leão (Author) (Other); José Machado da Silva (Author) (FEUP); José Silva Matos (Author) (FEUP)
1997
Flexible use of IP gores on dynamically reconfigurable systems
Miguel L. Silva (Author) (FEUP); João Canas Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)
Flexible hardware acceleration for nesting problems
J. Soeiro Ferreira (Author) (FEUP); J. Silva Matos (Author) (FEUP); José F. Oliveira (Author) (FEUP); J. Carlos Alves (Author) (FEUP); J. Canas Ferreira (Author) (FEUP); C. Albuquerque (Author) (Other)
FAFNER - Accelerating Nesting Problems with FPGAs
J. Carlos Alves (Author) (FEUP); J. Canas Ferreira (Author) (FEUP); C. Albuquerque (Author) (Other); J. Silva Matos (Author) (FEUP); José F. Oliveira (Author) (FEUP); J. Soeiro Ferreira (Author) (FEUP)
1999
Indexing
CONTROL AND OBSERVATION OF ANALOG NODES IN MIXED-SIGNAL BOARDS
José S. Matos (Author) (FEUP); Ana C. Leão (Author) (FEUP); João Canas Ferreira (Author) (FEUP)
BST-Based Test Generation for Mixed-Signal Boards
João Canas Ferreira (Author) (FEUP); Ana Leão (Author) (Other); José Silva Matos (Author) (FEUP)
Application Development for Dynamically Reconfigurable Co-Processors
João Canas Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)
1998
A Flexible Custom Computing Machine for Nesting Problems
João Canas Ferreira (Author) (FEUP); José Carlos Alves (Author) (FEUP); Célio Albuquerque (Author) (Other); José Fernando Oliveira (Author) (FEUP); José Soeiro Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)
A Development Support System for Applications that Use Dynamically Reconfigurable Hardware
João Canas Ferreira (Author) (FEUP); José Silva Matos (Author) (FEUP)
2004
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