Code: | EIC0039 | Acronym: | MFES |
Keywords | |
---|---|
Classification | Keyword |
OFICIAL | Software Engineering |
Active? | Yes |
Web Page: | http://moodle.up.pt/ |
Responsible unit: | Department of Informatics Engineering |
Course/CS Responsible: | Master in Informatics and Computing Engineering |
Acronym | No. of Students | Study Plan | Curricular Years | Credits UCN | Credits ECTS | Contact hours | Total Time |
---|---|---|---|---|---|---|---|
MIEIC | 135 | Syllabus since 2009/2010 | 4 | - | 6 | 56 | 162 |
1- BACKGROUND Students should have knowledge about software processes and software modelling.
2- SPECIFIC AIMS To develop abstraction capabilities in order to describe what the system should do and not the way to do it. Be familiar with formal methods and the way they can contribute to increase the quality of software systems.
3- PREVIOUS KNOWLEDGE Software engineering; Computing Theory; Algorithm design and analysis.
4- PERCENT DISTRIBUTION Scientific component:75% Technological component:25%
5- LEARNING OUTCOMES At the end of the course students should be able to: - Apply formal methods of specification (based on models, based on properties, based on behavior) and verification ("Model-checking, formal proofs and test) in the development of software systems. - Identify existing formal methods and know when they should be applied and which are most suitable in each case.
At the end of the course, students should be able to specify a software system in a declarative way, to distinguish the various existing formal methods and when to apply them and realize the usefulness of these techniques for improving the quality of software systems.
1. Introduction
1.1 What are formal methods?
1.2 Importance and applicability of formal methods in the development of software
1.3 Life cycle models and software development processes by incorporating formal methods.
1.4 Specification, refinement, implementation, verification and validation
1.5 Classification of formal methods
1.6 Explicit vs. implicit models, executable vs. non-executable
1.7 Formal verification techniques
2. Alloy Constraint Analyser for modelling and semantic analysis
2.1 Declarative modelling
2.2 Difference related to model checking
2.3 Alloy commands
2.4 Functions; predicates; facts; assertions and verifications (checks)
2.5 Static vs. dynamic modelling
2.6 Simulation of an operation
2.7 Check safety properties
2.8 Alloy analyser tool
3. Logic and model checking
3.1 Propositional, predicate, linear temporal (LTL) and computer tree logic (CTL)
3.2 State representation
3.3 Model checking:
3.3.1 properties: safety, fairness, liveness, universality, possibility, absence, response, precedence
3.3.2 The state explosion problem (techniques to diminish the problem): Symbolic state; bounds; on-the-fly; Partial Order Reduction (POR); abstraction
4. Formal proofs
4.1 Application of Hoare’s logic to algorithm correction
4.2 Gallina specification language: types of expressions, propositions and proofs; inductive data types; proof and automation tactics; inductive predicates
4.3 Program Correctness Proof
4.4 Coq, Caduceus, JAPE and Krakatoa
5. Model Based Specification
5.1 VDM-SL and VDM++ languages
5.2 Data representation based on mathematical structures (sets, sequences, finite functions)
5.3 State and non-state specification
5.4 Definition of types, values and functions
5.5 Definition of classes, instance variables and operations
5.6 Expressions and instructions
5.7 Design-by-contact: definition of invariables, preconditions and postconditions
5.8 Description of algorithms, executable specifications
5.9 Analysis of specification consistency
5.10 Connection of VDM++ to UML
5.11 Code generation from a formal specification
5.12 VDMTools
Theoretical classes will be based on the presentation of the themes of the course. Practical classes will be based on exercises, so that students can contact with the various tools available and to do their assignments.
Designation | Weight (%) |
---|---|
Exame | 35,00 |
Teste | 40,00 |
Trabalho laboratorial | 25,00 |
Total: | 100,00 |
Designation | Time (hours) |
---|---|
Estudo autónomo | 60,00 |
Frequência das aulas | 52,00 |
Trabalho laboratorial | 50,00 |
Total: | 162,00 |
Students have to reach a minimum mark of 45% in the continuous assessment component. The presence in the practical classes is recorded and mandatory according to existing legislation.
Distributed evaluation with final exam, with the following components:
(A) Open book mini-test (Alloy) - 1 hour (40% of the final mark), minimum grade of 45%.
(B) Practical work - (25% of the final mark), minimum grade of 45%.
(C) Open book final exam - 1h 30m (35% of the final mark), minimum grade of 45%.
Final grade = (A) * 40% + (B) * 25% + (C) * 35%
Notes: The difference between Final Mark and the mark of the exam cannot be higher than 3 points. It will be adjusted if it is. Students who fail to obtain approval in Alloy mini test module may make a further assessment on the final exam of the course. The Alloy component can only be improved in second exame.
Mini Exam about Alloy on the 24th October.
Practical work of VDM++: delivery by 23:00 on the 12th December; defense of practical work during the practical lessons of the week 15 to 19 Dec.
The defense of practical work is mandatory for ALL students.
Students excused from attendance at practical classes should contact the teacher for special sessions of follow up. The defense of practical work is mandatory for ALL students.
- The classification of the mini exam can only be improved in the appeal exam.
- Students who do not obtain approval in mini exam may make an additional module of 1h in the appeal exam.
- The marks obtained in practical work can be improved in the next edition of the discipline
- The classification of the test can be improved by in the appeal exame.
Students with class attendance in the previous year will have to take an exam with 2h30 (including the Alloy component). The marks obtained in the previous year in the work of VDM++ will be used as a mark for the work in VDM++ of this edition.