Computer Architectures and Operating Systems

Code:

EEC0031

Acronym:

ASOP

Keywords
Classification	Keyword
OFICIAL	Informatics
OFICIAL	Electronics and Digital Systems

Instance: 2008/2009 - 2S

Active?	Yes
Responsible unit:	Electronics and Digital Systems
Course/CS Responsible:	Master in Electrical and Computers Engineering

Cycles of Study/Courses

Acronym	No. of Students	Study Plan	Curricular Years	Credits UCN	Credits ECTS	Contact hours	Total Time
MIEEC	111	Syllabus since 2006/2007	3	-	7	77	187
			4
		Plano para bachareis que em 06 estiveram no 5º ano	4	-	7	77	187
		Syllabus since 2007/2008	3	-	7	77	187
			4
		Plano para alunos que em 2006 estiveram no 3º ano	4	-	7	77	187
		Plano para alunos que em 2006 estiveram no 5º ano	3	-	7	77	187
		Plano para alunos que em 2006 estiveram no 4º ano	3	-	7	77	187
			4
		Plano para bachareis que em 06 estiveram no 4º ano	4	-	7	77	187

Teaching language

Portuguese

Objectives

Provide the students with the basic technical knowledge concerning the operation and architecture of the hardware and software that support modern computers.

Program

Computer Architecture
Introduction: concepts, historical perspective and processor families.
Computer organization: processors, memories, peripheral devices.
Implementation: data path, control unit, pipelines, caches.
Instruction Set Architecture: instruction types and formats, data types, addressing modes.
Operating Systems
Introduction: concepts, functions, associated software, interfaces.
Processes: concepts, models, scheduling, intercommunication.
Concurrency: multiprogramming, synchronization, deadlocks.
Input/Output: devices, controllers, interruptions.
Memory: physical and virtual (pages and segments); memory management.
File systems: data storage, naming, attributes.

Mandatory literature

Tanenbaum, Andrew S.; Structured computer organization. ISBN: 0-13-020435-8
Tanenbaum, Andrew S. 1944-; Modern operating systems. ISBN: 0-13-031358-0

Teaching methods and learning activities

Theoretical classes: exposition and discussion of contents, followed by the presentation of examples.
Practical Classes: paper and pencil problem discussion and resolution; training of programming skills with VERILOG hardware description language and POSIX environment.

Software

GCC
Xilinx ISE 8.2i
GDB
ModelSim

Evaluation Type

Distributed evaluation with final exam

Assessment Components

Description	Type	Time (hours)	Weight (%)	End date
Attendance (estimated)	Participação presencial	65,00
	Exame	1,00		2009-04-17
	Exame	1,00		2009-06-08
	Exame	2,00		2009-07-25
	Total:	-	0,00

Amount of time allocated to each course unit

Description	Type	Time (hours)	End date
	Estudo autónomo	30	2009-06-05
	Estudo autónomo	80	2009-07-25
	Total:	110,00

Eligibility for exams

Regular class attendance and minimum classification of 40% on the distributed evaluation component

Calculation formula of final grade

0,3D + 0,7E
where:
D – distributed evaluation grade (2 mini-tests)
E – written exam grade
0,3D = 0,15MT1 + 0,15MT2,
where MT1/2 is the 1st/2nd mini-test

Examinations or Special Assignments

Two 30 minutes duration mini-tests, concurrently with semester classes.
One 2 hour duration exam on the normal examination period.
All examinations are individual, written, with no personal documentation allowed for consultation.

Special assessment (TE, DA, ...)

There is none: all evaluation components apply to all the students regardless of their enrollment regime.

Classification improvement

Final written exam in the resit examination period, up to the maximum grade. The exam lasts for 2h30m and no personal documentation is allowed for consultation.

Observations

Pre-requirements: basic knowledge of C programming.
Important comment: the student who shows dishonest academic behavior will be reported to the Course Principal.