Go to:
Esta página em português Ajuda Autenticar-se
exposição Formas Escondidas: revelar o interior da madeira
You are here: Start > EIC0083

Site map
Edifício A (Administração) Edifício B (Aulas) - Bloco I Edifício B (Aulas) - Bloco II Edifício B (Aulas) - Bloco III Edifício B (Aulas) - Bloco IV Edifício C (Biblioteca) Edifício D (CICA) Edifício E (Química) Edifício F (Minas e Metalurgia) Edifício F (Minas e Metalurgia) Edifício G (Civil) Edifício H (Civil) Edifício I (Electrotecnia) Edifício J (Electrotecnia) Edifício K (Pavilhão FCNAUP) Edifício L (Mecânica) Edifício M (Mecânica) Edifício N (Garagem) Edifício O (Cafetaria) Edifício P (Cantina) Edifício Q (Central de Gases) Edifício R (Laboratório de Engenharia do Ambiente) Edifício S (INESC) Edifício T (Torre do INEGI) Edifício U (Nave do INEGI) Edifício X (Associação de Estudantes)

Computer Architecture and Organization

Code: EIC0083     Acronym: AOCO

Classification Keyword
OFICIAL Computer Arquitechture

Instance: 2018/2019 - 1S Ícone do Moodle

Active? Yes
Responsible unit: Department of Electrical and Computer Engineering
Course/CS Responsible: Master in Informatics and Computing Engineering

Cycles of Study/Courses

Acronym No. of Students Study Plan Curricular Years Credits UCN Credits ECTS Contact hours Total Time
MIEIC 187 Syllabus since 2009/2010 1 - 6 70 162

Teaching Staff - Responsibilities

Teacher Responsibility
João Paulo de Castro Canas Ferreira

Teaching - Hours

Lectures: 3,00
Recitations: 2,00
Type Teacher Classes Hour
Lectures Totals 1 3,00
João Paulo de Castro Canas Ferreira 3,00
Recitations Totals 6 12,00
João Paulo de Castro Canas Ferreira 2,00
Bruno Miguel Carvalhido Lima 4,00
António José Duarte Araújo 6,00
Mais informaçõesLast updated on 2018-10-17.

Fields changed: Mandatory literature

Teaching language



This course introduces the principles of operation and general structure of a modern computer and its general structure, with particular emphasis on the contribution of each subsystem to the overall performance. The analysis of the implementation technology of computers (logic circuits and memory), together with the basic principles of digital information representation, will allow students to identify and describe the principles of computer operation, programming languages and software development.

Learning outcomes and competences

After completing the course, students will be able to:

  1. Identify and describe the major subsystems of a personal computer;
  2. Describe and interpret binary representation of numerical information;
  3. Perform basic arithmetic operations in binary;
  4. Evaluate the performance of computers in simple scenarios;
  5. Identify and explain the operation of basic logic circuits (combinational and sequential);
  6. Explain the operation of standard combinational circuits;
  7. Explain the operation of solid-state memories and analyse the operation of memory modules;
  8. Explain the basic principles of instruction encoding;
  9. Write simple programs in assembly language involving Boolean and arithmetic operations, tests, jumps and subroutines;
  10. Describe the operation of a single-cycle processing unit;
  11. Explain organization and operation of direct-access cache memories;
  12. Identify the different levels of the memory hierarchy and their impact on performance.

Working method



M1.Introduction. Computers: application areas of and their characteristics.
M2.Representation of information: binary representation of integers. Elementary arithmetic operations. Codes. IEEE-754 floating-point format.
M3.Combinational logic circuits. Boolean expressions. Elementary logic gates. Logic diagrams. Logic simulator. Standard circuits.
M4.Synchronous circuits: Memory elements, register and counters. Address decoding.
M5.Computers: high-level languages, low-level languages. Conceptual model of program execution. Subsystems: CPU, memory, input/output peripherals.
M6.CPU performance: Basic performance equation, benchmarks, Amdahl's Law.
M7.Instruction set: Instruction types, address modes, encoding.
M8.Basic concepts of assembly programming. Assembler. Subroutines.
M9.Organization of a simple central processing unit. Single-cycle CPU: performance, limitations.
M10. Cache memory: Memory hierarchies.  Cache memories. Performance.

Mandatory literature

David Patterson, John Hennessy; Computer Organization and Design: The Hardware/Software Interface ARM Edition, Elsevier / Morgan Kaufmann , 2016. ISBN: 9780128017333
Conjuntos de exercícios resolvidos e exercícios propostos
Cópias de acetatos e textos fornecidos
Carlos Pedro Baptista ; Introdução aos Sistemas Digitais, FCA, 2015. ISBN: 9789727227709

Teaching methods and learning activities

Teaching methods

The course includes lectures on the subject matter, including, where appropriate, the presentation of examples and their discussion. The practical classes include the presentation, analysis and resolution of a number of problems.

Two small project activities (using simulation tools) to be carried out in two blocks of 3 practical classes (with the help of assistants).

Learning activities outside the classroom: Multiple-choice questionnaires for self-evaluation.



Simulador de circuitos digitais
Development Studio 5 Community Edition


Technological sciences > Engineering > Computer engineering

Evaluation Type

Distributed evaluation without final exam

Assessment Components

Designation Weight (%)
Participação presencial 10,00
Teste 90,00
Total: 100,00

Amount of time allocated to each course unit

Designation Time (hours)
Estudo autónomo 66,00
Frequência das aulas 56,00
Trabalho laboratorial 40,00
Total: 162,00

Eligibility for exams

Elligibility for exams requires: Participation in, at least, 75% of the scheduled TP classes (excluding the TP classes for project work).

Elligibility must be acquired in the current edition of the curricular unit or have been acquired in the immediatley preceeding edition.

Calculation formula of final grade

The course grade is calculated from:

  • two tests (90 minutes each);
  • two quizzes about the practical projects (30 minutes each);
  • participation in the project support sessions

There will be three moments for evaluation:

  1. Test 1 (T1)
  2. Quizz 1 (F1)
  3. Test 2 and quizz 2 (T2  e F2)

with T1 and T2: marks for the tests; F1 and F2: marks for the quizzes.

The marks are combined in two components:

  • P1 = 0.7×T1 + 0.3×F1
  • P2 = 0,7×T2 + 0.3×F2
 P1 and P2 are rounded to tenths of grade.

The final grade is given by 

NFinal = 0.1×NA + 0.9 × (P1+P2)/2,

where NA is the mark for participation in the projects. NFinal is rounded to units.

There will be an extra test exclusively for students who obtain a final score lower than 10   (after rounding). Each component (P1  or P2) with score below 9.5 may be taken once.
The maximum score awarded for  the extra test is 9.5 (out of 20) (for each component).
This score will replace the previous score of the corresponding component.
The extra test does not lower the final score.

Special assessment (TE, DA, ...)

Taking the written tests and quizzes required of regular students.

Classification improvement

Classification can only be improved by teaking the course again on the next occurrence of the curricular unit.
Recommend this page Top
Copyright 1996-2020 © Faculdade de Engenharia da Universidade do Porto  I Terms and Conditions  I Accessibility  I Index A-Z  I Guest Book
Page generated on: 2020-02-29 at 05:20:32