FPGA implementation of autonomous navigation algorithm with dynamic adaptation of quality of service

• Type: Article in International Conference Proceedings Book
• Date: 2013

Authors

Jose Carlos Sá (Author) FEUP; João Canas Ferreira (Author) FEUP; José Carlos Alves (Author) FEUP

Conference proceedings National

Title: Actas IX Jornadas sobre Sistemas Reconfiguráveis

Pages: 111-116

IX Jornadas sobre Sistemas Reconfiguráveis

Coimbra, Portugal, 7 e 8 de Fevereiro de 2013

Scientific classification

FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering

Other information

Abstract (EN): The main goal of this work is to build an hardware-aided autonomous navigation system based on real-time stereo images and to study Partial Reconfiguration aspects applied to the system. The system is built on an reconfigurable embedded development platform consisting of an IBM PowerPC 440 processor embedded in a Xilinx Virtex-5 FPGA to accelerate the most critical task. Three Reconfigurable Units were incorporated in the designed system architecture. The dynamic adjustment of system¿s quality of service was achieved by using different reconfiguration strategies to match vehicle speed. A speedup of 2 times for the critical task was obtained, compared with a software-only version. For larger images, the same implementation would achieve an estimated speedup of 2.5 times.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 6