Go to:
Logótipo
Comuta visibilidade da coluna esquerda
Você está em: Start > Publications > View > FPGA-based real-time disparity computation and object location
Publication

Publications

FPGA-based real-time disparity computation and object location

Title
FPGA-based real-time disparity computation and object location
Type
Article in International Conference Proceedings Book
Year
2010
Authors
Santos, PM
(Author)
Other
The person does not belong to the institution. The person does not belong to the institution. The person does not belong to the institution. View Authenticus page Without ORCID
Conference proceedings International
Pages: 1-4
28th Norchip Conference, NORCHIP 2010
Tampere, 15 November 2010 through 16 November 2010
Indexing
Scientific classification
FOS: Engineering and technology > Electrical engineering, Electronic engineering, Information engineering
CORDIS: Technological sciences > Engineering > Computer engineering ; Technological sciences > Engineering > Electronic engineering
Other information
Authenticus ID: P-007-X3A
Abstract (EN): This paper describes an FPGA-based system capable of computing the distance of objects in a scene to two stereo cameras, and use that information to isolate objects in the foreground. For this purpose, four disparity maps are generated in real time, according to different similarity metrics and sweep directions, and then merged into a single foreground-versus-background bitmap. Our main contribution is a custom-built hardware architecture for the disparity map calculation, and an optional post-processing stage that coarsens the output to improve resilience against spurious results. The system was described in Verilog, and a prototype implemented on a Xilinx Virtex-II Pro FPGA proved capable of processing 640x480 black-and-white images at a maximum frame rate of 40 fps, using 3x3 matching windows and detecting disparities of up to 135 pixels. ©2010 IEEE.
Language: English
Type (Professor's evaluation): Scientific
Contact: jcf@fe.up.pt
Documents
We could not find any documents associated to the publication.
Related Publications

Of the same authors

Scalable hardware architecture for disparity map computation and object location in real-time (2016)
Article in International Scientific Journal
Santos, PM; João Canas Ferreira; José Silva Matos

Of the same scientific areas

Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems (2013)
Article in International Scientific Journal
João Bispo; Nuno Paulino; João Cardoso; João Canas Ferreira
Run-time generation of partial FPGA configurations for subword operations (2012)
Article in International Scientific Journal
Silva, ML; João Canas Ferreira
Translating a Hash Function from Software to Hardware: A Functional Programming Approach (2012)
Article in International Conference Proceedings Book
Paulo Ferreira; João Canas Ferreira; José Carlos Alves
The Performance Impact when Optimizing Mapping Algorithms for an FPGA-based Mobile Robot (2010)
Article in International Conference Proceedings Book
Manuel Luís C. Reis; João M. P. Cardoso; João P. C. Ferreira
Real-Time Stereo Matching on FPGA (2010)
Article in International Conference Proceedings Book
Carlos Resende; João Canas Ferreira

See all (15)

Recommend this page Top
Copyright 1996-2025 © Faculdade de Direito da Universidade do Porto  I Terms and Conditions  I Acessibility  I Index A-Z
Page created on: 2025-07-08 at 19:44:47 | Privacy Policy | Personal Data Protection Policy | Whistleblowing