An Infrastructure and Application Specific Processor for Testing Analogue and Mixed-Signal SoCs

• Type: Article in International Conference Proceedings Book
• Date: 2004

Authors

Francisco X. Duarte (Author) FEUP; José Machado da Silva (Author) FEUP; José C. Alves (Author) FEUP; José S. Matos (Author) FEUP

Conference proceedings International

Title: Proceedings of XIX Conference on Design of Circuits and Integrated Systems

Pages: 123-128

XIX Conference on Design of Circuits and Integrated Systems

Bordeaux, France, November 24-26, 2004

Other information

Abstract (EN): This paper proposes an infrastructure and methodology for testing analogue and mixed-signal cores embedded in systems-on-chip. It comprises an application specific processor and wrappers around the cores under test. The processor, which can be implemented on the reconfigurable area of the chip, is responsible for the scheduling and control of test operations, as well as for the interface with the external tester. On-chip stimuli generation, test control, and data compression allow for minimizing external tester interface resources and test time. The testing of an A/D converter is described as an example. This test is performed using an algorithm that allows measuring harmonic distortion after a reduced number of signatures.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 6