A precise low power and hardware-efficient time synchronization method for wearable systems

• Type: Chapter or Part of a Book
• Date: 2019

Authors

Fardin Derogarian (Author) Other; João Canas Ferreira (Author) FEUP; Vítor Grade Tavares (Author) FEUP; José Machado da Silva (Author) FEUP; Fernando José Velez (Author) Other

Book

Title: Wearable Technologies and Wireless Body Sensor Networks for Healthcare

Pages: 289-320

ISBN: 9781785612176

Electronic ISBN: 9781785612183

Indexing

Scopus - 0 Citations

INSPEC

Other information

Authenticus ID: P-00R-037

DOI: 10.1049/pbhe011e_ch9

Abstract (EN): This chapter presents a one-way method for synchronization at the media access control (MAC) layer of nodes and a circuit based on that in a wearable sensor network. The proposed approach minimizes the time skew with an accuracy of half of clock cycle in average. The work is intended to be used in a router integrated circuit (IC) designed for wearable systems. In particular, we address the need for good time synchronization in the simultaneous acquisition of surface electromyographic signals of several muscles. In our main application case, the electrodes are embedded in patient clothes connected to sensor nodes (SNs) equipped with analog-to-digital converters. The SNs are connected together in a network using conducting yarns embedded in the clothes. In the context of such wearable sensor networks, the main contributions of this work are the evaluation of existing protocols for synchronization, the description of a simpler, resource-efficient synchronization protocol, and its analysis, including the determination of the average local and global clock skew and of the synchronization probability in the presence of link failures. Both theoretical analysis and experimental results, in wired wearable networks, show that the proposed protocol has a better performance than precision time protocol (PTP), a standard timing protocol for both single and multihop situations. The proposed approach is simpler, requires no calculations, and exchanges fewer messages. Experimental results obtained with an implementation of the protocol in 0.35 μm complementary metal oxide semiconductor (CMOS) technology show that this approach keeps the one-hop average clock skew around 4.6 ns and peak-to-peak skew around 50 ns for a system clock frequency of 20 MHz.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 32