Using a tightly-coupled pipeline in dynamically reconfigurable platform FPGAs

• Type: Article in International Conference Proceedings Book
• Date: 2005

Authors

Silva, ML (Author) Other; João Canas Ferreira (Author) FEUP

Conference proceedings International

Title: DSD 2005: 8th Euromicro Conference on Digital System Design, Proceedings

Pages: 383-386

8th Euromicro Conference on Digital System Design

Oporto, PORTUGAL, AUG 30-SEP 03, 2005

Indexing

ISI Web of Knowledge - 2 Citations

Scopus - 4 Citations

Other information

Authenticus ID: P-000-5JR

DOI: 10.1109/DSD.2005.74

Abstract (EN): The paper describes the organization and use of a pipeline that is tightly-coupled to the CPU inside a platform FPGA with support for dynamic partial reconfiguration. It describes the overall hardware system organization and the pipeline structure, and presents the associated development environment and run-time support system, including the support for dynamically changing pipeline implementations and altering the operations of a pipeline stage.

Language: English

Type (Professor's evaluation): Scientific

No. of pages: 4