On Identifying Segments of Traces for Dynamic Compilation

• Type: Article in International Conference Proceedings Book
• Date: 2010

Authors

João Bispo (Author) Other; João M. P. Cardoso (Author) FEUP

Conference proceedings International

Title: Proceedings - 2010 International Conference on Field Programmable Logic and Applications, FPL 2010

Pages: 263-266

20th International Conference on Field Programmable Logic and Applications, FPL 2010

Milano, 31 August 2010 through 2 September 2010

Indexing

Scopus - 8 Citations

Other information

Authenticus ID: P-007-XDR

DOI: 10.1109/FPL.2010.61

Abstract (EN): Typical computing systems based on general purpose processors (GPPs) are extended with coarse-grained reconfigurable arrays (CGRAs) to provide higher performance and/or energy savings. In order for applications to take advantage of these computing systems, efficient dynamic mapping techniques are required. Those dynamic mapping techniques will be responsible for automatically moving computations originally running in the GPP to the CGRA. The concept of dynamic compilation, widespread in the context of JIT compilation to GPPs, is receiving more attention by the reconfigurable computing community. This paper presents our approach to dynamically map computations to CGRAs coupled to a GPP. Specifically, we present the identification of large sequences of instructions, MegaBlocks, being executed in a GPP. These MegaBlocks are then mapped to the target CGRA. We evaluate the potential of the MegaBlocks over Basic Blocks and SuperBlocks to increase the IPC when targeting a CGRA and considering the execution of a number of representative benchmarks. © 2010 IEEE.

Language: English

Type (Professor's evaluation): Scientific