Flexible hardware acceleration for nesting problems

• Type: Article in International Conference Proceedings Book
• Date: 1998

Authors

Canas C Ferreira (Author) FEUP; Carlos C Alves (Author) Other; Albuquerque, C (Author) Other; Oliveira Jose, F (Author) FEUP; Soeiro S Ferreira (Author) Other; Silva S Matos (Author) Other

Conference proceedings International

Title: 1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196)

Pages: 345-348

Indexing

ISI Web of Knowledge

Scopus - 1 Citation

Other information

Authenticus ID: P-007-86T

DOI: 10.1109/icecs.1998.813337

Abstract (EN): The nesting (or placement) problem is an NP-hard combinatorial problem with important industrial applications, e.g. in apparel or footwear industry. This paper describes a hardware infrastructure to accelerate the processing of the underlying geometric information. The system consists of an FPGA-based reconfigurable platform enhanced by an ASIC for the processing of irregular polygons. The paper discusses the need for such a platform, establishes the main design guidelines and describes the architecture and modes of operation of both the reconfigurable infrastructure and the dedicated IC.

Language: English

Type (Professor's evaluation): Scientific