A hybrid mapreduce model for prolog

• Type: Article in International Conference Proceedings Book
• Date: 2015

Authors

Corte Real, J (Author) Other; Dutra, I (Author) FCUP; Rocha, R (Author) FCUP

Conference proceedings International

Title: Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014

Pages: 340-343

14th International Symposium on Integrated Circuits, ISIC 2014

10 December 2014 through 12 December 2014

Indexing

ISI Web of Knowledge - 0 Citations

Scopus - 0 Citations

Scientific classification

FOS: Engineering and technology

Other information

Authenticus ID: P-00A-8HR

DOI: 10.1109/isicir.2014.7029555

Abstract (EN): Interest in the Map Reduce programming model has been rekindled by Google in the past 10 years; its popularity is mostly due to the convenient abstraction for parallelization details this framework provides. State-of-the-art systems such as Google's, Hadoop or SAGA often provide added features like a distributed file system, fault tolerance mechanisms, data redundancy and portability to the basic Map Reduce framework. However, these features pose an additional overhead in terms of system performance. In this work, we present a Map Reduce design for Prolog which can potentially take advantage of hybrid parallel environments; this combination allies the easy declarative syntax of logic programming with its suitability to represent and handle multi-relational data due to its first order logic basis. Map Reduce for Prolog addresses efficiency issues by performing load balancing on data with different granularity and allowing for parallelization in shared memory, as well as across machines. In an era where multicore processors have become common, taking advantage of a cluster's full capabilities requires the hybrid use of parallelism. © 2014 IEEE.

Language: English

Type (Professor's evaluation): Scientific